- 易迪拓培训,专注于微波、射频、天线设计工程师的培养
DXP中用DRC来验证PCB的设计，.DRC文件出现如下字样，请资深工程师指点
录入：edatop.com 点击：
Processing Rule : Room SAD (Bounding Region = (151.257mm, 75.057mm, 768.604mm, 115.062mm(InComponentClass('SAD'))
Violation between Component X101(20.193mm,32.639mm) on Top Layer and
Room SAD (Bounding Region = (151.257mm, 75.057mm, 768.604mm, 115.062mm) (InComponentClass ('SAD'))
Violation between SOIC Component U3(78.232mm,46.736mm) on Top Layer and
Room SAD (Bounding Region = (151.257mm, 75.057mm, 768.604mm, 115.062mm) (InComponentClass('SAD'))
请问高手上面这段文字表示我的PCB中有什么错误，如何修改，谢谢！
Cadence Allegro 培训套装，视频教学，直观易学
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