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请教spb16.2 orcad capture生成网络表的问题

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session里面出现这样的提示,找不到里面提示的part和pin啊,怎么解决?
Spawning... "F:\Cadence\SPB_16.2\tools\capture\pstswp.exe" -pst -d "f:\cadence1\111\sch\XXX_evm_orcad_revf.dsn" -n "F:\CADENCE1\111\SCH\ALLEGRO" -c "F:\Cadence\SPB_16.2\tools\capture\allegro.cfg" -v 3 -j "CB Footprint"
#1 Warning [ALG0016] Part Name "CAP 100NF CERMC 16V 10% 603_EIA0402_5.6PF" is renamed to "CAP 100NF CERMC 16V 10% 603_EIA".
#2 Warning [ALG0016] Part Name "CAP P_EIA2816P_1000UF " is renamed to "CAP P_EIA2816P_1000UF".
#3 Warning [ALG0016] Part Name "CAPACITOR POL_1_EIA1206P_10UF 6.3V" is renamed to "CAPACITOR POL_1_EIA1206P_10UF 6".
#4 Warning [ALG0016] Part Name "CAPACITOR POL_0_EIA1206P_10UF,6.3V" is renamed to "CAPACITOR POL_0_EIA1206P_10UF,6".
#5 Warning [ALG0016] Part Name "CAPACITOR POL_0_EIA1206P_33UF,6.3V" is renamed to "CAPACITOR POL_0_EIA1206P_33UF,6".
#6 Warning [ALG0016] Part Name "CAP P_EIA1311P_100UF " is renamed to "CAP P_EIA1311P_100UF".
#7 Warning [ALG0016] Part Name "LM4040DIM_LM4040_SOT23_LM4040DCIM3-4.1" is renamed to "LM4040DIM_LM4040_SOT23_LM4040DC".
#8 Warning [ALG0016] Part Name "CONNECTOR 45 X 2_1_QSH_30G_CONNECTOR 30 X 2" is renamed to "CONNECTOR 45 X 2_1_QSH_30G_CONN".
#9 Warning [ALG0016] Part Name "CONNECTOR 45 X 2_3_QSH_60G_CONNECTOR 60 X 2" is renamed to "CONNECTOR 45 X 2_3_QSH_60G_CONN".
#10 Warning [ALG0051] Pin "CI_INTBn/ATA_HIOWn/GPIO20/EM_WAIT2" is renamed to "CI_INTBN/ATA_HIOWN/GPIO20/EM_W" after substituting illegal characters in Package HD_0CC , U29A: SCHEMATIC1, SHEET07 -  HD DDR IF (5.80, 0.60).
#11 Warning [ALG0051] Pin "PCI_INTCn/ATA_IORDY/GPIO21/EM_WAIT1" is renamed to "PCI_INTCN/ATA_IORDY/GPIO21/EM_W" after substituting illegal characters in Package HD_0CC , U29A: SCHEMATIC1, SHEET07 - HD DDR IF (5.80, 0.60).
#12 Warning [ALG0051] Pin "PCI_REQn/ATA_DMARQ/GPIO11/EM_CS5n" is renamed to "PCI_REQN/ATA_DMARQ/GPIO11/EM_CS" after substituting illegal characters in Package HD_0CC , U29A: SCHEMATIC1, SHEET07 - HD DDR IF (5.80, 0.60).
#13 Warning [ALG0051] Pin "PCI_CBE0n/ATA_CS0n/GPIO33/EM_A18" is renamed to "PCI_CBE0N/ATA_CS0N/GPIO33/EM_A1" after substituting illegal characters in Package HD_0CC , U29A: SCHEMATIC1, SHEET07 - DDR IF (5.80, 0.60).
#14 Warning [ALG0051] Pin "PCI_CBE1n/ATA_CS1n/GPIO32/EM_A19" is renamed to "PCI_CBE1N/ATA_CS1N/GPIO32/EM_A1" after substituting illegal characters in Package HD_0CC , U29A: SCHEMATIC1, SHEET07 - HD DDR IF (5.80, 0.60).
#15 Warning [ALG0051] Pin "PCI_GNTn/ATA_DACKn/GPIO12/EM_CS4n" is renamed to "PCI_GNTN/ATA_DACKN/GPIO12/EM_CS" after substituting illegal characters in Package HD_0CC , U29A: SCHEMATIC1, SHEET07 - HD DDR IF (5.80, 0.60).
#16 Warning [ALG0051] Pin "UTXD2/URCTX2/CRG1_PO/GPIO40/CRG0_PO" is renamed to "UTXD2/URCTX2/CRG1_PO/GPIO40/CRG" after substituting illegal characters in Package HD_0DD , U29A: SCHEMATIC1, SHEET07 - HD DDR IF (5.80, 0.60).
#17 Warning [ALG0051] Pin "URXD2/CRG1_VCXI/GPIO39/CRG0_VCXI" is renamed to "URXD2/CRG1_VCXI/GPIO39/CRG0_VCX" after substituting illegal characters in Package HD_0DD , U29A: SCHEMATIC1, SHEET07 - HD DDR IF (5.80, 0.60).
#18 Warning [ALG0051] Pin "UCTS2n/USD2/CRG0_VCXI/GPIO42/ST1_PSTO" is renamed to "UCTS2N/USD2/CRG0_VCXI/GPIO42/ST" after substituting illegal characters in Package HD_0DD , U29A: SCHEMATIC1, SHEET07 - HD DDR IF (5.80, 0.60).
#19 Warning [ALG0016] Part Name "MIC74BQS_0_TSSOP20_PCF8574APWRG4" is renamed to "MIC74BQS_0_TSSOP20_PCF8574APWRG".
Scanning netlist files ...
Loading... F:\CADENCE1\111\SCH\ALLEGRO/pstchip.dat
Loading... F:\CADENCE1\111\SCH\ALLEGRO/pstchip.dat
Loading... F:\CADENCE1\111\SCH\ALLEGRO/pstxprt.dat
Loading... F:\CADENCE1\111\SCH\ALLEGRO/pstxnet.dat
ERROR(SPCODD-413):
   Error at line 1131 in file F:\CADENCE1\111\SCH\ALLEGRO/pstxnet.dat.
Reference designators inconsistent in xprt and xnet files. Reference Designator in xprt file: U21. Reference Designator in xnet file: U63. Schematic Instance XXX_evm_orcad_revf.schematic1(sch_1):ins16664498@\505962\.\sn74lvc1gu04_9.normal\(chips) (MODULE: XXX_EVM_ORCAD_REVF; PART: SN74LVC1GU04_9).
ERROR(SPCODD-383): Error at line 1131 in file F:\CADENCE1\111\SCH\ALLEGRO/pstxnet.dat. Error loading the net list file
#20 Error   [ALG0036] Unable to read logical netlist data.
Exiting... "F:\Cadence\SPB_16.2\tools\capture\pstswp.exe" -pst -d "f:\cadence1\111\sch\XXX_evm_orcad_revf.dsn" -n "F:\CADENCE1\111\SCH\ALLEGRO" -c "F:\Cadence\SPB_16.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"
*** Done ***

也遇到了这个问题,说一下解决方法:
把U21 U23删除,然后重新从库里放到原理图里面就OK了。

你没有update原理图吧,还有看一下元件库的路径设置对了没。

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