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Using FET_IV_Gm_PowerCalcs Design guide
I am using FET_IV_Gm_PowerCalc (design guide>Amplifier>DC and Bias point) for designing a Power amplifier and finding Bias point. but when I put my transistor Spice model ( I got it from manufacturer site) instead of default transistor, it doesn't work good and the IV curve is incorrect.
My transistor is D2201UK from Semelab with 2.5 W output power.
what is the problem?
Best Regards.
m_zerang on May 23, 2015 2:41 PM
附图/附件
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> what is the problem?
You forgot to set the correct voltage range for Vgs.
Looking at Fig. 4 in the D2201UK datasheet, you need a *positive* voltage in the range 6 to 16V.
First of all thanks for your answer.
I saw datasheet again. for I-V curve Vgs is 6 to 16 volt and the drain voltage is 12.5 volt. Next I simulate the spice model with Vgs from 6 to 16 and these warnings are detected:
Warning detected by hpeesofsim during DC analysis `DC1'.
Circuit converged with at least one device's P-N junction current
exceeding the explosion current and junction has been linearized.
You may want to increase the explosion current in the device model or in
the Options (if the parameter is not given in the model) and resimulate.
You may need to increase Maximum number of warnings under Output tab
in Options to see which devices have been linearized.
Warning detected by hpeesofsim during DC analysis `DC1'.
Diode `X1.dbody' explosion current exceeded.
Warning detected by hpeesofsim during DC analysis `DC1'.
JFET `X1.jfet' explosion current exceeded.
I increase Imax and Imelt of the models to 3A but nothing happened.
what should I do ???
thanks alot again :)
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