求两篇pipeline 的文章
录入：edatop.com 阅读：
1. A.M.A.Ali , Christopher Dillon, Robert Sneed, et al. "A 14-bit 125MS/s IF/RF Sampling Pipelined ADC With 100dB SFDR and 50fs Jitter", IEEE J.Solid-Stage Circuits,vol.41,NO.8,pp.1846-pp.1855,August 20062. Kush Gulati, M. Shang Peng, A. Pulincherry, C. E. Munoz, M. Lugin, et al, “A Highly Integrated CMOS Analog Baseband Transceiver With
180 MSPS 13-bit Pipelined CMOS ADC and Dual 12-bit DACs,” IEEE J. Solid-State Circuits, vol. 41, pp 1856-1866, August 2006.
谢谢！
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